Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK

There has been an increasing interest in creating short-range, low data-rate underwater wireless sensor networks for scientific marine exploration and monitoring. However, the lack of an inexpensive, low-power, underwater acoustic modem is preventing the proliferation of these sensor networks. Thus, we are building an underwater acoustic modem that considers cost and power at every level, from the analog electronics, to the modulation scheme, to the hardware platform. In this paper, we use reconfigurable devices to explore the design space of our modulation scheme – Frequency Shift Keying (FSK) – to select an implementation that provides the lowest power and area without sacrificing reliability. Specifically, we explore the bit error rate, power and area tradeoffs of coherent and non-coherent FSK in response to varying baud rate, signal to noise ratio (SNR), synchronization errors, and Field Programmable Gate Array (FPGA) devices. We determine that although coherent FSK provides better bit error rate in the general case, non-coherent FSK shows similar bit error rate under high SNR and low baud rate parameters and saves nearly 4 times the hardware area over the coherent scheme on the same FPGA devices.